//////////////////////////////////////////ok
#include"stdafx.h"
#include "bochs.h"



void IA32_CPU::MUL_AXEw(Ia32_Instruction_c *i)
{
  Bit16u op1_16, op2_16;
  op1_16 = AX;

  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), &op2_16);
  }

  Bit32u product_32  = ((Bit32u) op1_16) * ((Bit32u) op2_16);
  Bit16u product_16l = (product_32 & 0xFFFF);
  Bit16u product_16h =  product_32 >> 16;

  IA32_SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, IA32_INSTR_MUL16);
  AX = product_16l;
  DX = product_16h;
}

void IA32_CPU::IMUL_AXEw(Ia32_Instruction_c *i)
{
  Bit16s op1_16, op2_16;

  op1_16 = AX;
  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), (Bit16u *) &op2_16);
  }

  Bit32s product_32  = ((Bit32s) op1_16) * ((Bit32s) op2_16);
  Bit16u product_16l = (product_32 & 0xFFFF);
  Bit16u product_16h = product_32 >> 16;

  AX = product_16l;
  DX = product_16h;
  IA32_SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, IA32_INSTR_IMUL16);
}

void IA32_CPU::DIV_AXEw(Ia32_Instruction_c *i)
{
  Bit16u op2_16, remainder_16, quotient_16l;
  Bit32u op1_32, quotient_32;

  op1_32 = (((Bit32u) DX) << 16) | ((Bit32u) AX);
  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), &op2_16);
  }

  if (op2_16 == 0)
    exception(IA32_BX_DE_EXCEPTION, 0, 0);

  quotient_32  = op1_32 / op2_16;
  remainder_16 = op1_32 % op2_16;
  quotient_16l = quotient_32 & 0xFFFF;

  if (quotient_32 != quotient_16l)
    exception(IA32_BX_DE_EXCEPTION, 0, 0);

  AX = quotient_16l;
  DX = remainder_16;
}

void IA32_CPU::IDIV_AXEw(Ia32_Instruction_c *i)
{
  Bit16s op2_16, remainder_16, quotient_16l;
  Bit32s op1_32, quotient_32;

  op1_32 = ((((Bit32u) DX) << 16) | ((Bit32u) AX));

  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), (Bit16u *) &op2_16);
  }

  if (op2_16 == 0)
    exception(IA32_BX_DE_EXCEPTION, 0, 0);

  if ((op1_32 == ((Bit32s)0x80000000)) && (op2_16 == -1))
    exception(IA32_BX_DE_EXCEPTION, 0, 0);

  quotient_32  = op1_32 / op2_16;
  remainder_16 = op1_32 % op2_16;
  quotient_16l = quotient_32 & 0xFFFF;

  if (quotient_32 != quotient_16l)
    exception(IA32_BX_DE_EXCEPTION, 0, 0);

  AX = quotient_16l;
  DX = remainder_16;
}

void IA32_CPU::IMUL_GwEwIw(Ia32_Instruction_c *i)
{
  Bit16s op2_16, op3_16;

  op3_16 = i->Iw();
  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), (Bit16u *) &op2_16);
  }

  Bit32s product_32  = op2_16 * op3_16;
  Bit16u product_16l = (product_32 & 0xFFFF);
  Bit16u product_16h = (product_32 >> 16);
  IA32_WRITE_16BIT_REG(i->nnn(), product_16l);
  IA32_SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, IA32_INSTR_IMUL16);
}

void IA32_CPU::IMUL_GwEw(Ia32_Instruction_c *i)
{
  Bit16s op1_16, op2_16;

  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    read_virtual_word(i->seg(), IA32_RMAddr(i), (Bit16u *) &op2_16);
  }

  op1_16 = IA32_READ_16BIT_REG(i->nnn());
  Bit32s product_32  = op1_16 * op2_16;
  Bit16u product_16l = (product_32 & 0xFFFF);
  Bit16u product_16h = (product_32 >> 16);
  IA32_WRITE_16BIT_REG(i->nnn(), product_16l);
  IA32_SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, IA32_INSTR_IMUL16);
}
